M X L - 1 3 1 - I I I M O B I L E M A MAXTOR NO MORE PRODUCED Native| Translation ------+-----+-----+----- Form PCMCIA TYPE III Cylinders 1534| | | Capacity form/unform 131/ MB Heads 4| | | Seek time / track 19.0/ 6.0 ms Sector/track | | | Controller PCMCIA / ATA Precompensation Cache/Buffer 31 KB Landing Zone Data transfer rate 2.100 MB/S int Bytes/Sector 512 4.000 MB/S ext Recording method RLL 1/7 operating | non-operating -------------+-------------- Supply voltage 5 V Temperature *C 5 55 | -40 70 Power: sleep W Humidity % 5 90 | 5 90 standby W Altitude km -0.061 3.048| idle W Shock g 100 | 600 seek W Rotation RPM 4464 read/write W Acoustic dBA spin-up W ECC Bit MTBF h 300000 Warranty Month 12 Lift/Lock/Park YES Certificates ********************************************************************** L A Y O U T ********************************************************************** MAXTOR MXL SERIES PRODUCT MANUAL PART #1226 P4 303-651-6000 10.0 Min +-++ +- +-----------------------+------------+ | | +---------+ X | | | X | | | X 54.0+ | | X | | | X 0.10| | | X | | | X | | | X | | +--------+ X +- +------------------------+-----------+ +------------------+-----------------+ 85.6 0.2 + +---------------------------------+ 10.5+ | +--+ + 0 + +------------------------------------+ - 0.05 ++-+ 10.0 Min ********************************************************************** J U M P E R S ********************************************************************** MAXTOR MXL SERIES PRODUCT MANUAL PART #1226 P4 303-651-6000 Introduction ------------ Maxtor MXL Series PCMCIA disk drive are 1.8" random access storage devices which have a PCMCIA Type form factor and incorporate both the PCMCIA 2.0 compatible interface and the 68-pin ATA interface. THE DRIVE WILL AUTOMATICALLY CONFIGURE TO THE PROPER INTERFACE WHEN INSERTED IN A SYSTEM. ********************************************************************** I N S T A L L ********************************************************************** MAXTOR MXL SERIES PRODUCT MANUAL PART #1226 P4 303-651-6000 Notes on Installation ===================== Installation direction ---------------------- horizontally vertically +-----------------+ +--+ +--+ | | | +-----+ +-----+ | | | | | | | | | +-+-----------------+-+ | | | | | | +---------------------+ | | | | | | | | | | | | | | | | | | +---------------------+ | +-----+ +-----+ | +-+-----------------+-+ +--+ +--+ | | | | +-----------------+ The drive will operate in all axis (6 directions). Recommended Mounting Configuration ---------------------------------- Maxtor MXL Series drive design allows greater shock tolerance than that afforded by larger, heavier drives. The drive may be mounted within a host system at any attitude. Allow adequate ventilation to the drive to ensure reliable operation. Air Filtration System --------------------- All MXL Series drives are designed to operate in a typical mobile computing environment with minimum environmental control. Over the life of the drive, a filter and breather element maintain a clean environment to the heads and disks. Drive Mechanism --------------- A sensorless, 12-pole brushless DC direct drive motor with hydro dynamic bearings rotates the spindle at 4,464 RPM ( 0.25%). Interface Connector ------------------- MXL Series drives insert into a PCMCIA 2.0 Type III socket or a 68-pin ATA connector. The drive socket is keyed to prevent inverted insertion. The host socket must be capable of providing sufficient power. +---+---+--------------------------+-----------------------------+ |Pin|I/O|PCMCIA Memory |PCMCIA I/O | +---+---+--------------------------+-----------------------------+ | 01| |GND Ground |GND Ground | +---+---+--------------------------+-----------------------------+ | 02|I/O|D3 Data Bit 3 |D3 Data Bit 3 | +---+---+--------------------------+-----------------------------+ | 03|I/O|D4 Data Bit 4 |D4 Data Bit 4 | +---+---+--------------------------+-----------------------------+ | 04|I/O|D5 Data Bit 5 |D5 Data Bit 5 | +---+---+--------------------------+-----------------------------+ | 05|I/O|D6 Data Bit 6 |D4 Data Bit 6 | +---+---+--------------------------+-----------------------------+ | 06|I/O|D7 Data Bit 7 |D3 Data Bit 7 | +---+---+--------------------------+-----------------------------+ | 07|I |CE1- Card Enable |CE1- Card Enable | +---+---+--------------------------+-----------------------------+ | 08|I |A10 Address Bit 10 |A10 Address Bit 10 | +---+---+--------------------------+-----------------------------+ | 09|I |OE- Output Enable |OE- Output Enable | +---+---+--------------------------+-----------------------------+ | 10|I |N/U Not Used - HiZ |N/U Not Used - HiZ | +---+---+--------------------------+-----------------------------+ | 11|I |A9 Address Bit 9 |A9 Address Bit 9 | +---+---+--------------------------+-----------------------------+ | 12|I |A8 Address Bit 8 |A8 Address Bit 8 | +---+---+--------------------------+-----------------------------+ | 13|I |N/U Not Used - HiZ |N/U Not Used - HiZ | +---+---+--------------------------+-----------------------------+ | 14|I |N/U Not Used - HiZ |N/U Not Used - HiZ | +---+---+--------------------------+-----------------------------+ | 15|I |WE- Write Enable |WE1 Write Enable | +---+---+--------------------------+-----------------------------+ | 16|O |RDY/BSY Ready/Busy |IREQ- Interrupt Request | +---+---+--------------------------+-----------------------------+ | 17|I |Vcc |Vcc | +---+---+--------------------------+-----------------------------+ | 18|I |N/U Not Used |N/U Not Used | +---+---+--------------------------+-----------------------------+ | 19|I |N/U Not Used - HiZ |N/U Not Used - HiZ | +---+---+--------------------------+-----------------------------+ | 20|I |N/U Not Used - HiZ |N/U Not Used - HiZ | +---+---+--------------------------+-----------------------------+ | 21|I |N/U Not Used - HiZ |N/U Not Used - HiZ | +---+---+--------------------------+-----------------------------+ | 22|I |A7 Address Bit 7 |A7 Address Bit 7 | +---+---+--------------------------+-----------------------------+ | 23|I |A6 Address Bit 6 |A6 Address Bit 6 | +---+---+--------------------------+-----------------------------+ | 24|I |A5 Address Bit 5 |A5 Address Bit 5 | +---+---+--------------------------+-----------------------------+ | 25|I |A4 Address Bit 4 |A4 Address Bit 4 | +---+---+--------------------------+-----------------------------+ | 26|I |A3 Address Bit 3 |A3 Address Bit 3 | +---+---+--------------------------+-----------------------------+ | 27|I |A2 Address Bit 2 |A2 Address Bit 2 | +---+---+--------------------------+-----------------------------+ | 28|I |A1 Address Bit 1 |A1 Address Bit 1 | +---+---+--------------------------+-----------------------------+ | 29|I |A0 Address Bit 0 |A0 Address Bit 0 | +---+---+--------------------------+-----------------------------+ | 30|I/O|D0 Data Bit 0 |D0 Data Bit 0 | +---+---+--------------------------+-----------------------------+ | 31|I/O|D1 Data Bit 1 |D1 Data Bit 1 | +---+---+--------------------------+-----------------------------+ | 32|I/O|D2 Data Bit 2 |D2 Data Bit 2 | +---+---+--------------------------+-----------------------------+ | 33|O |WP Write Protect |IOIS16- IO Port is 16 bit | +---+---+--------------------------+-----------------------------+ | 34| |GND Ground |GND Ground | +---+---+--------------------------+-----------------------------+ | 35| |GND Ground |GND Ground | +---+---+--------------------------+-----------------------------+ | 36|O |CD1- Card Detect |CD1- Card Detect | +---+---+--------------------------+-----------------------------+ | 37|I/O|D11 Data Bit 11 |D11 Data Bit 11 | +---+---+--------------------------+-----------------------------+ | 38|I/O|D12 Data Bit 12 |D12 Data Bit 12 | +---+---+--------------------------+-----------------------------+ | 39|I/O|D13 Data Bit 13 |D13 Data Bit 13 | +---+---+--------------------------+-----------------------------+ | 40|I/O|D14 Data Bit 14 |D14 Data Bit 14 | +---+---+--------------------------+-----------------------------+ | 41|I/O|D15 Data Bit 15 |D15 Data Bit 15 | +---+---+--------------------------+-----------------------------+ | 42|I |CE2- Card Enable |CE2- Card Enable | +---+---+--------------------------+-----------------------------+ | 43|I |N/U Not Used |N/U Not Used | +---+---+--------------------------+-----------------------------+ | 44|I |N/U Not Used |IORD- IO Read | +---+---+--------------------------+-----------------------------+ | 45|I |N/U Not Used |IOWR- IO Write | +---+---+--------------------------+-----------------------------+ | 46|I |N/U Not Used - HiZ |N/U Not Used - HiZ | +---+---+--------------------------+-----------------------------+ | 47|I |N/U Not Used - HiZ |N/U Not Used - HiZ | +---+---+--------------------------+-----------------------------+ | 48|I |N/U Not Used - HiZ |N/U Not Used - HiZ | +---+---+--------------------------+-----------------------------+ | 49|I |N/U Not Used - HiZ |N/U Not Used - HiZ | +---+---+--------------------------+-----------------------------+ | 50|I |N/U Not Used - HiZ |N/U Not Used - HiZ | +---+---+--------------------------+-----------------------------+ | 51|I |Vcc |Vcc | +---+---+--------------------------+-----------------------------+ | 52|I |N/U Not Used |N/U Not Used | +---+---+--------------------------+-----------------------------+ | 53|I |N/U Not Used - HiZ |N/U Not Used - HiZ | +---+---+--------------------------+-----------------------------+ | 54|I |N/U Not Used - HiZ |N/U Not Used - HiZ | +---+---+--------------------------+-----------------------------+ | 55|I |N/U Not Used - HiZ |N/U Not Used - HiZ | +---+---+--------------------------+-----------------------------+ | 56|I |N/U Not Used - HiZ |N/U Not Used - HiZ | +---+---+--------------------------+-----------------------------+ | 57|I |N/U Not Used |N/U Not Used | +---+---+--------------------------+-----------------------------+ | 58|I |RESET Card Reset |RESET Card Reset | +---+---+--------------------------+-----------------------------+ | 59|O |WAIT- Extend Bus Cycle |WAIT- Extend Bus Cycle | +---+---+--------------------------+-----------------------------+ | 60|O |N/U Not Used |INPACK- Input Port ACK | +---+---+--------------------------+-----------------------------+ | 61|I |REG- Register Select |REG- Register Select | +---+---+--------------------------+-----------------------------+ | 62|O |N/U Not Used |N/U Not Used | +---+---+--------------------------+-----------------------------+ | 63|O |N/U Not Used |STSCHG- Change Status | +---+---+--------------------------+-----------------------------+ | 64|I/O|D8 Data Bit 8 |D8 Data Bit 8 | +---+---+--------------------------+-----------------------------+ | 65|I/O|D9 Data Bit 9 |D9 Data Bit 9 | +---+---+--------------------------+-----------------------------+ | 66|I/O|D10 Data Bit 10 |D10 Data Bit 10 | +---+---+--------------------------+-----------------------------+ | 67|O |CD2- Card Detect |CD2- Card Detect | +---+---+--------------------------+-----------------------------+ | 68| |GND Ground |GND Ground | +---+---+--------------------------+-----------------------------+ -------------+----------------------------------------------------- Signal Name |Signal Description -------------+----------------------------------------------------- Address Bus |PCMCIA Mode - (Memory and I/O) Signals A0 through A25 |are the host address signals which select a Memory or |I/O register. A0 is not used in Word-Access Mode. -------------+----------------------------------------------------- Data Bus |All modes - Signals D0 through D15 constiture the bi- |directional data bus. -------------+----------------------------------------------------- Card Enable |PCMCIA Mode - (Memory and I/O) CE1 enables transfer |of even-numbered bytes; CE2, odd-numbered bytes. -------------+----------------------------------------------------- Output Enable|PCMCIA Mode - (Memory and I/O) The OE line is the |active-low signal used to gate Memory Read data from |the card. -------------+----------------------------------------------------- Write Enable |PCMCIA Mode - (Memory and I/O) The WE signal is used |to strobe Memory Write data into the card. -------------+----------------------------------------------------- Ready/Busy |PCMCIA Memory Mode - the Ready/Busy signal is driven |low to indicate the card is busy and unable to accept |a Data Transfer operation. -------------+----------------------------------------------------- Interrupt |PCMCIA I/O Mode - The Interrupt Request signal is Request |asserted to indicate to the host that the card |requires host software service. -------------+----------------------------------------------------- Card Detect |All Modes - The -CD1 and -CD2 signals provide |indication that a card is inserted. -------------+----------------------------------------------------- Write Protect|PCMCIA Memory Mode - The WP output signal reflects the |state of the card's Write Protect switch. -------------+------------------------------------------------------ IOIS16 bit |PCMCIA I/O Mode - The IOIS16 output signal is Port |asserted when the IO Port being addressed is capable |of 16 bit access. -------------+----------------------------------------------------- REG |PCMCIA Mode - (Memory and I/O) The -REG signal is |asserted to select an access to Attribute Memory or |I/O space. -------------+----------------------------------------------------- Status |PCMCIA Memory Mode - not used Changed | |PCMCIA I/O Mode - status changed is asserted to |indicate a change in state of RDY/BSY or Write Protect -------------+----------------------------------------------------- Reset |PCMCIA Mode - the Reset signal clears the card |configuration registers and places the card in PCMCIA |Memory mode, active high. -------------+----------------------------------------------------- Wait |PCMCIA Mode - (Memory and I/O) The WAIT signal may be |asserted by the card to insert Wait States into host |I/O cycles. -------------+----------------------------------------------------- I/O Read |PCMCIA Memory Mode - not used. | |PCMCIA I/O Mode - The IORD signal enables data to the |host data bus for I/O mode register reads. -------------+----------------------------------------------------- I/O Write |PCMCIA Memory Mode - Not used. | |PCMCIA I/O Mode - The IOWR strobes data from the host |data bus for I/O mode Register Writes. -------------+----------------------------------------------------- Input |PCMCIA Memory Mode - Not Used. Acknowledge | |PCMCIA I/O Mode - The input acknowledge is asserted |when the card can respond to Read Cycle at the address |asserted. -------------+----------------------------------------------------- ********************************************************************** F E A T U R E S ********************************************************************** MAXTOR MXL SERIES PRODUCT MANUAL PART #1226 P4 303-651-6000 Interface Connector ------------------- MXL Series drives insert into a PCMCIA 2.0 Type III socket or a 68-pin ATA connector. The drive socket is keyed to prevent inverted insertion. The host socket must be capable of providing sufficient power. +---+---+--------------------------+ |Pin|I/O|ATA | +---+---+--------------------------+ | 01| |GND Ground | +---+---+--------------------------+ | 02|I/O|D3 Data Bit 3 | +---+---+--------------------------+ | 03|I/O|D4 Data Bit 4 | +---+---+--------------------------+ | 04|I/O|D5 Data Bit 5 | +---+---+--------------------------+ | 05|I/O|D6 Data Bit 6 | +---+---+--------------------------+ | 06|I/O|D7 Data Bit 7 | +---+---+--------------------------+ | 07|I |CS0- Chip Select 0 | +---+---+--------------------------+ | 08|I |N/U Not Used - HiZ | +---+---+--------------------------+ | 09|I |ATA- Select ATA Mode | +---+---+--------------------------+ | 10|I |N/U Not Used - HiZ | +---+---+--------------------------+ | 11|I |N/U Not Used - HiZ | +---+---+--------------------------+ | 12|I |N/U Not Used - HiZ | +---+---+--------------------------+ | 13|I |N/U Not Used - HiZ | +---+---+--------------------------+ | 14|I |N/U Not Used - HiZ | +---+---+--------------------------+ | 15|I |N/U Not Used | +---+---+--------------------------+ | 16|O |INTRQ Interrupt Request | +---+---+--------------------------+ | 17|I |Vcc | +---+---+--------------------------+ | 18|I |N/U Not Used | +---+---+--------------------------+ | 19|I |N/U Not Used - HiZ | +---+---+--------------------------+ | 20|I |N/U Not Used - HiZ | +---+---+--------------------------+ | 21|I |N/U Not Used - HiZ | +---+---+--------------------------+ | 22|I |N/U Not Used - HiZ | +---+---+--------------------------+ | 23|I |N/U Not Used - HiZ | +---+---+--------------------------+ | 24|I |N/U Not Used - HiZ | +---+---+--------------------------+ | 25|I |N/U Not Used - HiZ | +---+---+--------------------------+ | 26|I |N/U Not Used - HiZ | +---+---+--------------------------+ | 27|I |A2 Address Bit 2 | +---+---+--------------------------+ | 28|I |A1 Address Bit 1 | +---+---+--------------------------+ | 29|I |A0 Address Bit 0 | +---+---+--------------------------+ | 30|I/O|D0 Data Bit 0 | +---+---+--------------------------+ | 31|I/O|D1 Data Bit 1 | +---+---+--------------------------+ | 32|I/O|D2 Data Bit 2 | +---+---+--------------------------+ | 33|O |IOCS16- 16 Bit Transfer | +---+---+--------------------------+ | 34| |GND Ground | +---+---+--------------------------+ | 35| |GND Ground | +---+---+--------------------------+ | 36|O |CD1- Card Detect | +---+---+--------------------------+ | 37|I/O|D11 Data Bit 11 | +---+---+--------------------------+ | 38|I/O|D12 Data Bit 12 | +---+---+--------------------------+ | 39|I/O|D13 Data Bit 13 | +---+---+--------------------------+ | 40|I/O|D14 Data Bit 14 | +---+---+--------------------------+ | 41|I/O|D15 Data Bit 15 | +---+---+--------------------------+ | 42|I |CS1- Chip Select 1 | +---+---+--------------------------+ | 43|I |N/U Not Used | +---+---+--------------------------+ | 44|I |IOR- IO Read | +---+---+--------------------------+ | 45|I |IOW- IO Write | +---+---+--------------------------+ | 46|I |N/U Not Used - HiZ | +---+---+--------------------------+ | 47|I |N/U Not Used - HiZ | +---+---+--------------------------+ | 48|I |N/U Not Used - HiZ | +---+---+--------------------------+ | 49|I |N/U Not Used - HiZ | +---+---+--------------------------+ | 50|I |N/U Not Used - HiZ | +---+---+--------------------------+ | 51|I |Vcc | +---+---+--------------------------+ | 52|I |N/U Not Used | +---+---+--------------------------+ | 53|I |N/U Not Used - HiZ | +---+---+--------------------------+ | 54|I |N/U Not Used - HiZ | +---+---+--------------------------+ | 55|I |N/U Not Used - HiZ | +---+---+--------------------------+ | 56|I |N/U Not Used - HiZ | +---+---+--------------------------+ | 57|I |N/U Not Used | +---+---+--------------------------+ | 58|I |RESET- Drive Reset | +---+---+--------------------------+ | 59|O |IOCHRDY Extend Bus Cycle | +---+---+--------------------------+ | 60|O |DREQ DMA Request | +---+---+--------------------------+ | 61|I |DACK DMA Acknowledge | +---+---+--------------------------+ | 62|O |DASP- Drive Active | +---+---+--------------------------+ | 63|O |N/U Not Used | +---+---+--------------------------+ | 64|I/O|D8 Data Bit 8 | +---+---+--------------------------+ | 65|I/O|D9 Data Bit 9 | +---+---+--------------------------+ | 66|I/O|D10 Data Bit 10 | +---+---+--------------------------+ | 67|O |CD2- Card Detect | +---+---+--------------------------+ | 68| |GND Ground | +---+---+--------------------------+ -------------+----------------------------------------------------- Signal Name |Signal Description -------------+----------------------------------------------------- Address Bus |ATA Mode - Signals A0 through A25 are the host address |lines which select an ATA register to the drive. |Signals A3 through A25 are not used and are high |impedance. -------------+----------------------------------------------------- Data Bus |All modes - Signals D0 through D15 constiture the bi- |directional data bus. -------------+----------------------------------------------------- Chip Select |ATA Mode - Chip selects 0 selects command block |register addresses 1F0-1F7H. Chip Select 1 selects |control registers 3F6-3F7H. -------------+----------------------------------------------------- Output Enable|ATA Mode - This line selects ATA mode. At power on |reset, if this line remains low, the drive will |initialize in ATA mode. If this line ever goes high, |the drive will switch to the PCMCIA mode. -------------+----------------------------------------------------- Write Enable |ATA Mode - not used -------------+----------------------------------------------------- Interrupt |ATA Mode - Interrupt is the most asserted when the Request |disk requires attention. -------------+----------------------------------------------------- Card Detect |All Modes - The -CD1 and -CD2 signals provide |indication that a card is inserted. -------------+----------------------------------------------------- IOIS16 |ATA Mode - Indication to the host that the 16 bit |data port has been assigned and the drive is prepared |to transfer a 16 bit data word. -------------+----------------------------------------------------- DMA |ATA Mode - This signal is used with DREQ proc. DMA Acknowledge |transfer to acknowledge receipt of data. -------------+----------------------------------------------------- Status |ATA Mode - not used Changed | -------------+----------------------------------------------------- Reset- |ATA Mode - reset signal from the host system, active |during power up and inactive thereafter. Active low. -------------+----------------------------------------------------- I/O Channel |ATA Mode - this signal may be driven by the drive to Ready |insert wait states into host I/O cycles. -------------+----------------------------------------------------- Drive Active |ATA Mode - signal that indicates if the drive is |active. -------------+----------------------------------------------------- I/O Read |ATA Mode - Read strobe enables data from register on |drive onto the host data bus. -------------+----------------------------------------------------- I/O Write |ATA Mode - Write strobe, the rising edge of which |clocks data from the data bus into a register on the |drive. -------------+----------------------------------------------------- DMA Request |ATA Mode - This signal is used with DACK for data |transfers by asserting this signal, the drive |indicates that data is ready to be transferred to and |from the host. -------------+----------------------------------------------------- Interface Functional Description -------------------------------- The MXL-105-III conforms to the PCMCIA 2.0 and the PCMCIA-ATA 1.0 specification. When powered-up in the PCMCIA mode, the Card Information Structure is readable in PCMCIA attribute memory space. All addressing modes de- fined in the PCMCIA-ATA specifications are available. Addressing mode selection can be accomplished by writing the appropriate configura- tion registers in attribute memory space. When powered-up in ATA mode, the drive conforms to the 68-pin ATA mode as defined in the PCMCIA-ATA specification and the Small Form Factor disk drive specification. Sector Address Translation -------------------------- The MXL-105-III features a Universal Translate Mode. In an AT-class system, the drive may be configured to any specified logical combination of cylinders, heads, and sectors (within the range of the drive's formatted capacity). The MXL-105-III powers-up in the Translate Mode: 802 Cyl., 8 heads, 32 Sec.